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STP08DP05
Low voltage 8-Bit constant current Led sink with full outputs error detection
Features

Low voltage power supply down to 3V 8 constant current output channels Adjustable output current through external resistor Short and open output error detection Serial Data IN/Parallel data OUT 3.3V micro driver-able Output current: 5-100mA 30MHz clock frequency Available in high thermal efficiency TSSOP exposed pad ESD protection 2.5kV HBM, 200V MM The detection functionality is implemented without increasing the pin number, through a secondary function of the output enable and latch pin (DM1 and DM2 respectively), a dedicated logic sequence allows the device to enter or leave from detection mode. Through an external resistor, users can adjust the STP08DP05 output current, controlling in this way the light intensity of LEDs, in addition, user can adjust LED's brightness intensity from 0% to 100% via OE/DM2 pin. The STP08DP05 guarantees a 20V output driving capability, allowing users to connect more LEDs in series. The high clock frequency, 30MHz, also satisfies the system requirement of high volume data transmission. The 3.3V of voltage supply is well useful for applications that interface any micro from 3.3V. Compared with a standard TSSOP package, the TSSOP exposed pad increases heat dissipation capability by a 2.5 factor..
TSSOP16 SO-16 Dip-16 TSSOP16 (Exposed pad)
Description
The STP08DP05 is a monolithic, low voltage, low current power 8-bit shift register designed for LED panel displays. The STP08DP05 contains a 8-bit serial-in, parallel-out shift register that feeds a 8bitD-type storage register. In the output stage, eight regulated current sources were designed to provide 5-100mA constant current to drive the LEDs. The STP08DP05 is backward compatible in the functionality and footprint with STP8C/L596 and extends its functionality with open and short detection on the outputs. The detection circuit checks 3 different conditions that can occur on the output line: short to GND, short to VO or open line. The data detection results are loaded in the shift register and shifted out via the serial line output. Table 1. Device summary
Part Number STP08DP05B1R STP08DP05MTR STP08DP05TTR STP08DP05XTTR May 2007 Package DIP-16
Packaging 25 parts per tube 2500 parts per reel 2500 parts per reel 2500 parts per reel 1/30
www.st.com 30
SO-16 (Tape & Reel) TSSOP16 (Tape & Reel) TSSOP16 Exposed-Pad (Tape & Reel) Rev 2
Contents
STP08DP05
Contents
1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 3.2 3.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 5 6 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Truth table and timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.1 7.2 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8 9 10
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Detection mode functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
10.1 10.2 10.3 10.4 Phase one: "entering in detection mode" . . . . . . . . . . . . . . . . . . . . . . . . . 18 Phase two: "error detection" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Phase three: "resuming to normal mode" . . . . . . . . . . . . . . . . . . . . . . . . . 20 Error detection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
11 12
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
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STP08DP05
Summary description
1
Summary description
Table 2. Typical current accuracy
Current accuracy Output voltage Between bits 1.3V 1.5% Between ICs 5% 20 to 100mA Output current
1.1
Pin connection and description
Figure 1. Connections diagram
Note:
The Exposed-pad is electrically not connected
Table 3. Pin description
PIN N 1 2 3 4 5-12 13 14 15 16 Symbol GND SDI CLK LE/DM1 OUT 0-7 OE/DM2 SDO R-EXT VDD Ground terminal Serial data input terminal Clock input terminal Latch input terminal Output terminal Output enable input terminal (active low) Serial data out terminal Constant current programming 5V Supply voltage terminal Name and function
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Block diagram
STP08DP05
2
Figure 2.
Block diagram
Normal mode - block diagram
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STP08DP05
Maximum rating
3
Maximum rating
Stressing the device above the rating listed in the "Absolute Maximum Ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
3.1
Absolute maximum ratings
Table 4. Absolute maximum ratings
Symbol VDD VO IO IGND fCLK TOPR
TSTG
Parameter Supply voltage IGND Output voltage Output current GND terminal current Clock frequency Operating temperature range Storage temperature range
Value 0 to 7 -0.5 to 20 100 800 50 -40 to +125 -55 to +150
Unit V V mA mA MHz C C
3.2
Thermal data
Table 5. Thermal data
Symbol RthJA Parameter Thermal resistance junction-ambient DIP-16 SO-16 TSSOP-16 60 75 85 TSSOP-16 (1) (exposed pad) 37.5 Unit C/W
1. The Exposed-Pad should be soldered to the PBC to realize the thermal benefits
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Maximum rating
STP08DP05
3.3
Recommended operating conditions
Table 6. Recommended operating conditions
Symbol VDD VO IO IOH IOL VIH VIL twLAT twCLK twEN Parameter Supply voltage Output voltage Output current Output current Output current Input voltage Input voltage LE/DM1 pulse width CLK pulse width OE/DM2 pulse width VDD = 3.0 to 5.0V OUTn SERIAL-OUT SERIAL-OUT 0.7VDD -0.3 20 20 200 7 4 15 Cascade operation (1) 30 5 Test conditions Min 3.0 Typ Max 5.5 20 100 +1 -1 VDD+0.3 0.3VDD Unit V V mA mA mA V V ns ns ns ns ns ns MHz
tSETUP(D) Setup time for DATA tHOLD(D) Hold time for DATA tSETUP(L) Setup time for LATCH fCLK Clock frequency
1. If the device is connected in cascade, it may not be possible achieve the maximum data transfer. Please consider the timings carefully.
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STP08DP05
Electrical characteristics
4
Electrical characteristics
Table 7. Electrical characteristics (VDD=3.3V to 5V, T = 25C, unless otherwise specified.)
Symbol VIH VIL IOH VOL VOH IOL1 IOL2 IOL3 IOL1 IOL2 IOL3 RSIN(up) Output current error between bit (All Output ON) Pull-up resistor Output current Parameter Input voltage high level Input voltage low level Output leakage current Output voltage (Serial-OUT) Output voltage (Serial-OUT) VOH = 20V IOL = 1mA IOH = -1mA VO = 0.3V, Rext = 3.9k VO = 0.3V, Rext = 970 VO = 1.3V, Rext = 190 VO = 0.3VREXT = 3.9k VO = 0.3VREXT = 970 VO = 1.3VREXT =190 150 100 REXT = 980 OUT 0 to 7 = OFF Supply current (OFF) IDD(OFF2) IDD(ON1) Supply current (ON) IDD(ON2) Thermal Thermal protection (1) REXT = 250 OUT 0 to 7 = ON 11.7 170 13.5 C REXT = 250 OUT 0 to 7 = OFF REXT = 980 OUT 0 to 7 = ON 11.2 4.5 13.5 mA 5 VOH - VDD =- 0.4V 4.25 19 96 5 20 100 5 1.5 1.2 300 200 4 5.75 21 104 8 3 3 600 400 5 K K % mA Test conditions Min 0.7VDD GND 0.5 0.03 Typ Max VDD 0.3VDD 10 0.4 Unit V V A V V
RSIN(down) Pull-down resistor IDD(OFF1)
1. Guaranteed by desing (not tested) The thermal protection switches OFF only the outputs current
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Switching characteristics
STP08DP05
5
Table 1.
Symbol tPLH1
Switching characteristics
Switching characteristics (VDD = 5V, T = 25C, unless otherwise specified.)
Parameter Propagation delay time, CLK-OUTn, LE\DM1 = H, OE\DM2 = L Propagation delay time, LE\DM1 -OUTn, OE\DM2 = L Propagation delay time, OE\DM2-OUTn, LE\DM1 = H Propagation delay time, CLK-SDO Propagation delay time, CLK-OUTn, LE\DM1 = H, OE\DM2 = L Propagation delay time, LE\DM1 -OUTn, OE\DM2 = L Propagation delay time, OE\DM2-OUTn, LE\DM1 = H Propagation delay time, CLK-SDO Output rise time 10~90% of voltage waveform Output fall time 90~10% of voltage waveform CLK rise time (1) CLK fall time (1) Test conditions VDD = 3.3V VDD = 5V VDD = 3.3V VDD = 5V VDD = 3.3V VDD = 5V VDD = 3.3V VDD = 5V VDD = 3.3V VDD = 3.3 V VIL = GND IO = 20mA REXT = 1K VIH = VDD CL = 10pF VL = 3.0 V RL = 60 VDD = 5V VDD = 3.3V VDD = 5V VDD = 3.3V VDD = 5V VDD = 3.3V VDD = 5V VDD = 3.3V VDD = 5V VDD = 3.3V VDD = 5V Min Typ 35 18 48 30 55 36 7 4 10 7 24 20 20 17 22 18 25 10 5 4 Max 70 ns 35 90 ns 60 110 ns 75 14 ns 8 20 ns 14 50 ns 40 40 ns 35 30 ns 25 60 ns 25 15 ns 12 5000 5000 ns ns Unit
tPLH2
tPLH3
tPLH
tPHL1
tPHL2
tPHL3
tPHL
tON
tOFF tr tf
1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully.
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STP08DP05
Equivalent circuit and outputs
6
Equivalent circuit and outputs
Figure 3. OE/DM2 terminal
Figure 4.
LE/DM1 terminal
Figure 5.
CLK, SDI terminal
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Equivalent circuit and outputs Figure 6. SDO terminal
STP08DP05
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STP08DP05
Truth table and timing diagram
7
7.1
Truth table and timing diagram
Truth table
Table 8. Truth table
Clock LE/DM1 H OE/DM2 L SDI Dn OUT0 ........ OUT0 ........ OUT7 Dn ..... Dn -5 ..... Dn -7 SDO Dn -7
L
L
Dn + 1
No Change
Dn -7
H
L
Dn + 2
Dn +2 ..... Dn -3 ..... Dn -5
Dn -5
X
L
Dn + 3
Dn +2 ..... Dn -3 ..... Dn -5
Dn -5
X
H
Dn + 3
OFF
Dn -5
Note:
OUT0 to OUT7 = ON when Dn = H; OUT0 to OUT7 = OFF when Dn = L.
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Truth table and timing diagram
STP08DP05
7.2
Timing diagram
Figure 7. Timing diagram - normal mode
Figure 8.
Clock, serial-in, serial-out
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STP08DP05 Figure 9. Clock, serial-in, latch, enable, outputs
Truth table and timing diagram
Figure 10. Outputs
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Typical characteristics
STP08DP05
8
Typical characteristics
Figure 11. Output current-REXT resistor
8000 7000 6000 Rext (Ohm) 5000 4000 3000 2000 1000 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 Ouput Current (mA)
Table 9. Output current-REXT resistor
Output Current (mA) Rext () 3 6740 5 3930 10 1913 20 963 50 386 80 241 130 124
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STP08DP05 Figure 12. Power dissipation vs temperature package
Typical characteristics
Note:
The Exposed-Pad should be soldered to the PBC to realize the thermal benefits.
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Test circuit
STP08DP05
9
Test circuit
Figure 13. DC characteristics
Figure 14. AC characteristics
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STP08DP05 Figure 15. Timing example for open and/or short detection
Test circuit
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Detection mode functionality
STP08DP05
10
10.1
Detection mode functionality
Phase one: "entering in detection mode"
From the "Normal Mode" condition the device can switch to the "Error Mode" by a logic sequence on the OE/DM2 and LE/DM1 pins as showed in the following table and diagram: Table 10. Entering in detection truth table
CLK OE/DM2 LE/DM1 1 H L 2 L L 3 H L 4 H H 5 H L
Figure 16. Entering in detection timing diagram
After these five CLK cycles the device goes into the "Error Detection Mode" and at the 6th rise front of CLK the SDI data are ready for the sampling.
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STP08DP05
Detection mode functionality
10.2
Phase two: "error detection"
The eight data bits must be set "1" in order to set ON all the outputs during the detection. The data are latched by LE/DM1 and after that the outputs are ready for the detection process. When the Micro controller switches the OE/DM2 to LOW, the device drives the LEDs in order to analyze if an OPEN or SHORT condition has occurred.
Figure 17. Detection diagram
The LEDs status will be detected at least in 1 microsecond and after this time the microcontroller sets OE\DM2 in HIGH state and the output data detection result will go to the microprocessor via SDO. Detection mode and normal mode use both the same format data. As soon as all the detection data bits are available on the serial line, the device may go back to normal mode of operation. To re-detect the status the device must go back in normal mode and reentering in error detection mode .
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Detection mode functionality
STP08DP05
10.3
Phase three: "resuming to normal mode"
The sequence for re-entering in normal mode is showed in the following Table and diagram: Table 11. Resuming to normal mode timing diagram
CLK OE/DM2 LE/DM1 1 H L 2 L L 3 H L 4 H L 5 H L
Figure 18. Resuming to normal mode timing diagram
Note:
For proper device operation the "Entering in detection" sequence must be follow by a "Resume Mode" sequence, isn't possible to insert consecutive equal sequence.
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STP08DP05
Detection mode functionality
10.4
Error detection conditions
Table 12. Detection condition (VDD = 3.3 to 5 V Temperature range 25C)
SW-1 or SW-3b Open Line or Output Short to GND detected ==> IODEC 0.5 x IO No error detected No error detected ==> IODEC 0.5 x IO ==> VO 2.2 V
SW-2 or SW-3a
Short on LED or Short ==> VO 2.5V to V-LED detected
Note:
Where: IO = the output current programmed by the REXT , IODEC = the detected output current in detection mode. Figure 19. Detection circuit
16
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Package mechanical data
STP08DP05
11
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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STP08DP05
Package mechanical data
Plastic DIP-16 (0.25) MECHANICAL DATA
mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch
P001C
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Package mechanical data
STP08DP05
TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0079 0.201 0.260 0.176 inch
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
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STP08DP05
Package mechanical data
TSSOP16 EXPOSED PAD MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D D1 E E1 E2 e K L 0 0.45 0.60 0.8 0.19 0.09 4.9 1.7 6.2 4.3 1.5 0.65 8 0.75 0 0.018 0.024 6.4 4.4 6.6 4.5 5 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 0.031 0.007 0.004 0.193 0.067 0.244 0.169 0.059 0.0256 8 0.030 0.252 0.173 0.260 0.177 0.197 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 inch
7419276A
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Package mechanical data
STP08DP05
Tape & Reel TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.7 5.3 1.6 3.9 7.9 12.8 20.2 60 22.4 6.9 5.5 1.8 4.1 8.1 0.264 0.209 0.063 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch
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STP08DP05
Package mechanical data
SO-16 MECHANICAL DATA
DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.64 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.010 0.063 0.018 0.010
0016020D
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Package mechanical data
STP08DP05
Tape & Reel SO-16 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.45 10.3 2.1 3.9 7.9 12.8 20.2 60 22.4 6.65 10.5 2.3 4.1 8.1 0.254 0.406 0.082 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.262 0.414 0.090 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch
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STP08DP05
Revision history
12
Revision history
Table 13. Revision history
Date 3-Apr-2007 21-May-2007 Revision 1 2 First release Updated Table 7 on page 7 Changes
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STP08DP05
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